1. Field of the Invention
The invention relates to a metal-oxide-semiconductor (hereinafter abbreviated as MOS) transistor device, and more particularly, to a high voltage metal-oxide-semiconductor (herein after abbreviated as HV MOS) transistor device.
2. Description of the Prior Art
Integrated circuits (IC) technologies not only progressed in feature size and integration density but also in integrating various MOS transistor devices into one chip (or die). For example, in system-on-chip (SOC) technologies, different types of microelectronic devices such as logic devices, analog devices, memory arrays, and high voltage devices may be integrated into one semiconductor wafer aimed for improving circuit performance, reliability, manufacturing cycle time, cost, device speed, and other advantages. In other exemplar, HV MOS transistor devices and mixed-signal circuit may be combined together for various applications.
HV MOS transistor device typically uses well implants to create the source, drain and drift regions while the essential feature of HV MOS transistor device is the lateral-diffused drift region with low dopant concentration and large area that is used to alleviate the high voltage between the drain and the source. For working in the high voltage condition, it is known that the breakdown voltage (BVD) and reliability are key factors for the HV MOS transistor device, and thus improvements to BVD and device reliability are always in need.